Sigrity.OptimizePI.V2.0.2

OptimizePI enables design teams to balance decoupling capacitor (decap) cost and performance for printed circuit boards (PCBs) and IC packages. Decap costs savings of 15% to 50% are typical. High performance is analytically assured for the power delivery system (PDS) at both a system and component level. OptimizePI is built on proven Sigrity hybrid electromagnetic circuit analysis technology in combination with our unique optimization engine to quickly pinpoint the best possible decap selections and placement locations.

	OptimizePI Applications:
	Automatically selecting and placing decoupling capacitors Eliminating decap over-design for printed circuit boards and IC packages Reducing PDS cost for new designs and post-production products Developing effective decap guidelines for packaged components Recapturing design area by eliminating unnecessary decaps Assessing PDS cost vs. performance trade-offs interactively Optimizing a PDS across the board / package interface Creating lowest-cost / best performance decap placement tables
	OptimizePI Advantages:
	Quantifiable decap cost savings without PDS performance risk Unique fully automated environment for analyzing cost vs. performance Utilizes design data from popular PCB and IC package layout systems Robust and proven underlying hybrid EM / circuit analysis technology Intuitive and interactive visualization of PDS performance Simple to set up for pre-layout and post layout decap optimization Ability to support large designs that include both package and board data